1 ;-------------------------------------------------------- 2 ; File Created by SDCC : free open source ANSI-C Compiler 3 ; Version 2.9.0 #5416 (Mar 22 2009) (MINGW32) 4 ; This file was generated Tue Oct 12 23:27:14 2010 5 ;-------------------------------------------------------- 6 .module usrp_main 7 .optsdcc -mmcs51 --model-small 8 9 ;-------------------------------------------------------- 10 ; Public variables in this module 11 ;-------------------------------------------------------- 12 .globl _main 13 .globl _patch_usb_descriptors 14 .globl _isr_tick 15 .globl _bitALTERA_DCLK 16 .globl _bitALTERA_DATA0 17 .globl _bitS_IN 18 .globl _bitS_OUT 19 .globl _bitS_CLK 20 .globl _EIPX6 21 .globl _EIPX5 22 .globl _EIPX4 23 .globl _PI2C 24 .globl _PUSB 25 .globl _EIEX6 26 .globl _EIEX5 27 .globl _EIEX4 28 .globl _EI2C 29 .globl _EIUSB 30 .globl _SMOD1 31 .globl _ERESI 32 .globl _RESI 33 .globl _INT6 34 .globl _CY 35 .globl _AC 36 .globl _F0 37 .globl _RS1 38 .globl _RS0 39 .globl _OV 40 .globl _FL 41 .globl _P 42 .globl _TF2 43 .globl _EXF2 44 .globl _RCLK 45 .globl _TCLK 46 .globl _EXEN2 47 .globl _TR2 48 .globl _C_T2 49 .globl _CP_RL2 50 .globl _SM01 51 .globl _SM11 52 .globl _SM21 53 .globl _REN1 54 .globl _TB81 55 .globl _RB81 56 .globl _TI1 57 .globl _RI1 58 .globl _PS1 59 .globl _PT2 60 .globl _PS0 61 .globl _PT1 62 .globl _PX1 63 .globl _PT0 64 .globl _PX0 65 .globl _EA 66 .globl _ES1 67 .globl _ET2 68 .globl _ES0 69 .globl _ET1 70 .globl _EX1 71 .globl _ET0 72 .globl _EX0 73 .globl _SM0 74 .globl _SM1 75 .globl _SM2 76 .globl _REN 77 .globl _TB8 78 .globl _RB8 79 .globl _TI 80 .globl _RI 81 .globl _TF1 82 .globl _TR1 83 .globl _TF0 84 .globl _TR0 85 .globl _IE1 86 .globl _IT1 87 .globl _IE0 88 .globl _IT0 89 .globl _SEL 90 .globl _EIP 91 .globl _B 92 .globl _EIE 93 .globl _ACC 94 .globl _EICON 95 .globl _PSW 96 .globl _TH2 97 .globl _TL2 98 .globl _RCAP2H 99 .globl _RCAP2L 100 .globl _T2CON 101 .globl _SBUF1 102 .globl _SCON1 103 .globl _GPIFSGLDATLNOX 104 .globl _GPIFSGLDATLX 105 .globl _GPIFSGLDATH 106 .globl _GPIFTRIG 107 .globl _EP01STAT 108 .globl _IP 109 .globl _OEE 110 .globl _OED 111 .globl _OEC 112 .globl _OEB 113 .globl _OEA 114 .globl _IOE 115 .globl _IOD 116 .globl _AUTOPTRSETUP 117 .globl _EP68FIFOFLGS 118 .globl _EP24FIFOFLGS 119 .globl _EP2468STAT 120 .globl _IE 121 .globl _INT4CLR 122 .globl _INT2CLR 123 .globl _IOC 124 .globl _AUTODAT2 125 .globl _AUTOPTRL2 126 .globl _AUTOPTRH2 127 .globl _AUTODAT1 128 .globl _APTR1L 129 .globl _APTR1H 130 .globl _SBUF0 131 .globl _SCON0 132 .globl _MPAGE 133 .globl _EXIF 134 .globl _IOB 135 .globl _CKCON 136 .globl _TH1 137 .globl _TH0 138 .globl _TL1 139 .globl _TL0 140 .globl _TMOD 141 .globl _TCON 142 .globl _PCON 143 .globl _DPS 144 .globl _DPH1 145 .globl _DPL1 146 .globl _DPH 147 .globl _DPL 148 .globl _SP 149 .globl _IOA 150 .globl _hash1 151 .globl _EP8FIFOBUF 152 .globl _EP6FIFOBUF 153 .globl _EP4FIFOBUF 154 .globl _EP2FIFOBUF 155 .globl _EP1INBUF 156 .globl _EP1OUTBUF 157 .globl _EP0BUF 158 .globl _CT4 159 .globl _CT3 160 .globl _CT2 161 .globl _CT1 162 .globl _USBTEST 163 .globl _TESTCFG 164 .globl _DBUG 165 .globl _UDMACRCQUAL 166 .globl _UDMACRCL 167 .globl _UDMACRCH 168 .globl _GPIFHOLDAMOUNT 169 .globl _FLOWSTBHPERIOD 170 .globl _FLOWSTBEDGE 171 .globl _FLOWSTB 172 .globl _FLOWHOLDOFF 173 .globl _FLOWEQ1CTL 174 .globl _FLOWEQ0CTL 175 .globl _FLOWLOGIC 176 .globl _FLOWSTATE 177 .globl _GPIFABORT 178 .globl _GPIFREADYSTAT 179 .globl _GPIFREADYCFG 180 .globl _XGPIFSGLDATLNOX 181 .globl _XGPIFSGLDATLX 182 .globl _XGPIFSGLDATH 183 .globl _EP8GPIFTRIG 184 .globl _EP8GPIFPFSTOP 185 .globl _EP8GPIFFLGSEL 186 .globl _EP6GPIFTRIG 187 .globl _EP6GPIFPFSTOP 188 .globl _EP6GPIFFLGSEL 189 .globl _EP4GPIFTRIG 190 .globl _EP4GPIFPFSTOP 191 .globl _EP4GPIFFLGSEL 192 .globl _EP2GPIFTRIG 193 .globl _EP2GPIFPFSTOP 194 .globl _EP2GPIFFLGSEL 195 .globl _GPIFTCB0 196 .globl _GPIFTCB1 197 .globl _GPIFTCB2 198 .globl _GPIFTCB3 199 .globl _GPIFADRL 200 .globl _GPIFADRH 201 .globl _GPIFCTLCFG 202 .globl _GPIFIDLECTL 203 .globl _GPIFIDLECS 204 .globl _GPIFWFSELECT 205 .globl _SETUPDAT 206 .globl _SUDPTRCTL 207 .globl _SUDPTRL 208 .globl _SUDPTRH 209 .globl _EP8FIFOBCL 210 .globl _EP8FIFOBCH 211 .globl _EP6FIFOBCL 212 .globl _EP6FIFOBCH 213 .globl _EP4FIFOBCL 214 .globl _EP4FIFOBCH 215 .globl _EP2FIFOBCL 216 .globl _EP2FIFOBCH 217 .globl _EP8FIFOFLGS 218 .globl _EP6FIFOFLGS 219 .globl _EP4FIFOFLGS 220 .globl _EP2FIFOFLGS 221 .globl _EP8CS 222 .globl _EP6CS 223 .globl _EP4CS 224 .globl _EP2CS 225 .globl _EP1INCS 226 .globl _EP1OUTCS 227 .globl _EP0CS 228 .globl _EP8BCL 229 .globl _EP8BCH 230 .globl _EP6BCL 231 .globl _EP6BCH 232 .globl _EP4BCL 233 .globl _EP4BCH 234 .globl _EP2BCL 235 .globl _EP2BCH 236 .globl _EP1INBC 237 .globl _EP1OUTBC 238 .globl _EP0BCL 239 .globl _EP0BCH 240 .globl _FNADDR 241 .globl _MICROFRAME 242 .globl _USBFRAMEL 243 .globl _USBFRAMEH 244 .globl _TOGCTL 245 .globl _WAKEUPCS 246 .globl _SUSPEND 247 .globl _USBCS 248 .globl _XAUTODAT2 249 .globl _XAUTODAT1 250 .globl _I2CTL 251 .globl _I2DAT 252 .globl _I2CS 253 .globl _PORTECFG 254 .globl _PORTCCFG 255 .globl _PORTACFG 256 .globl _INTSETUP 257 .globl _INT4IVEC 258 .globl _INT2IVEC 259 .globl _CLRERRCNT 260 .globl _ERRCNTLIM 261 .globl _USBERRIRQ 262 .globl _USBERRIE 263 .globl _GPIFIRQ 264 .globl _GPIFIE 265 .globl _EPIRQ 266 .globl _EPIE 267 .globl _USBIRQ 268 .globl _USBIE 269 .globl _NAKIRQ 270 .globl _NAKIE 271 .globl _IBNIRQ 272 .globl _IBNIE 273 .globl _EP8FIFOIRQ 274 .globl _EP8FIFOIE 275 .globl _EP6FIFOIRQ 276 .globl _EP6FIFOIE 277 .globl _EP4FIFOIRQ 278 .globl _EP4FIFOIE 279 .globl _EP2FIFOIRQ 280 .globl _EP2FIFOIE 281 .globl _OUTPKTEND 282 .globl _INPKTEND 283 .globl _EP8ISOINPKTS 284 .globl _EP6ISOINPKTS 285 .globl _EP4ISOINPKTS 286 .globl _EP2ISOINPKTS 287 .globl _EP8FIFOPFL 288 .globl _EP8FIFOPFH 289 .globl _EP6FIFOPFL 290 .globl _EP6FIFOPFH 291 .globl _EP4FIFOPFL 292 .globl _EP4FIFOPFH 293 .globl _EP2FIFOPFL 294 .globl _EP2FIFOPFH 295 .globl _EP8AUTOINLENL 296 .globl _EP8AUTOINLENH 297 .globl _EP6AUTOINLENL 298 .globl _EP6AUTOINLENH 299 .globl _EP4AUTOINLENL 300 .globl _EP4AUTOINLENH 301 .globl _EP2AUTOINLENL 302 .globl _EP2AUTOINLENH 303 .globl _EP8FIFOCFG 304 .globl _EP6FIFOCFG 305 .globl _EP4FIFOCFG 306 .globl _EP2FIFOCFG 307 .globl _EP8CFG 308 .globl _EP6CFG 309 .globl _EP4CFG 310 .globl _EP2CFG 311 .globl _EP1INCFG 312 .globl _EP1OUTCFG 313 .globl _REVCTL 314 .globl _REVID 315 .globl _FIFOPINPOLAR 316 .globl _UART230 317 .globl _BPADDRL 318 .globl _BPADDRH 319 .globl _BREAKPT 320 .globl _FIFORESET 321 .globl _PINFLAGSCD 322 .globl _PINFLAGSAB 323 .globl _IFCONFIG 324 .globl _CPUCS 325 .globl _RES_WAVEDATA_END 326 .globl _GPIF_WAVE_DATA 327 .globl _g_tx_underrun 328 .globl _g_rx_overrun 329 .globl _g_rx_enable 330 .globl _g_tx_enable 331 .globl _app_vendor_cmd 332 ;-------------------------------------------------------- 333 ; special function registers 334 ;-------------------------------------------------------- 335 .area RSEG (DATA) 0080 336 _IOA = 0x0080 0081 337 _SP = 0x0081 0082 338 _DPL = 0x0082 0083 339 _DPH = 0x0083 0084 340 _DPL1 = 0x0084 0085 341 _DPH1 = 0x0085 0086 342 _DPS = 0x0086 0087 343 _PCON = 0x0087 0088 344 _TCON = 0x0088 0089 345 _TMOD = 0x0089 008A 346 _TL0 = 0x008a 008B 347 _TL1 = 0x008b 008C 348 _TH0 = 0x008c 008D 349 _TH1 = 0x008d 008E 350 _CKCON = 0x008e 0090 351 _IOB = 0x0090 0091 352 _EXIF = 0x0091 0092 353 _MPAGE = 0x0092 0098 354 _SCON0 = 0x0098 0099 355 _SBUF0 = 0x0099 009A 356 _APTR1H = 0x009a 009B 357 _APTR1L = 0x009b 009C 358 _AUTODAT1 = 0x009c 009D 359 _AUTOPTRH2 = 0x009d 009E 360 _AUTOPTRL2 = 0x009e 009F 361 _AUTODAT2 = 0x009f 00A0 362 _IOC = 0x00a0 00A1 363 _INT2CLR = 0x00a1 00A2 364 _INT4CLR = 0x00a2 00A8 365 _IE = 0x00a8 00AA 366 _EP2468STAT = 0x00aa 00AB 367 _EP24FIFOFLGS = 0x00ab 00AC 368 _EP68FIFOFLGS = 0x00ac 00AF 369 _AUTOPTRSETUP = 0x00af 00B0 370 _IOD = 0x00b0 00B1 371 _IOE = 0x00b1 00B2 372 _OEA = 0x00b2 00B3 373 _OEB = 0x00b3 00B4 374 _OEC = 0x00b4 00B5 375 _OED = 0x00b5 00B6 376 _OEE = 0x00b6 00B8 377 _IP = 0x00b8 00BA 378 _EP01STAT = 0x00ba 00BB 379 _GPIFTRIG = 0x00bb 00BD 380 _GPIFSGLDATH = 0x00bd 00BE 381 _GPIFSGLDATLX = 0x00be 00BF 382 _GPIFSGLDATLNOX = 0x00bf 00C0 383 _SCON1 = 0x00c0 00C1 384 _SBUF1 = 0x00c1 00C8 385 _T2CON = 0x00c8 00CA 386 _RCAP2L = 0x00ca 00CB 387 _RCAP2H = 0x00cb 00CC 388 _TL2 = 0x00cc 00CD 389 _TH2 = 0x00cd 00D0 390 _PSW = 0x00d0 00D8 391 _EICON = 0x00d8 00E0 392 _ACC = 0x00e0 00E8 393 _EIE = 0x00e8 00F0 394 _B = 0x00f0 00F8 395 _EIP = 0x00f8 396 ;-------------------------------------------------------- 397 ; special function bits 398 ;-------------------------------------------------------- 399 .area RSEG (DATA) 0086 400 _SEL = 0x0086 0088 401 _IT0 = 0x0088 0089 402 _IE0 = 0x0089 008A 403 _IT1 = 0x008a 008B 404 _IE1 = 0x008b 008C 405 _TR0 = 0x008c 008D 406 _TF0 = 0x008d 008E 407 _TR1 = 0x008e 008F 408 _TF1 = 0x008f 0098 409 _RI = 0x0098 0099 410 _TI = 0x0099 009A 411 _RB8 = 0x009a 009B 412 _TB8 = 0x009b 009C 413 _REN = 0x009c 009D 414 _SM2 = 0x009d 009E 415 _SM1 = 0x009e 009F 416 _SM0 = 0x009f 00A8 417 _EX0 = 0x00a8 00A9 418 _ET0 = 0x00a9 00AA 419 _EX1 = 0x00aa 00AB 420 _ET1 = 0x00ab 00AC 421 _ES0 = 0x00ac 00AD 422 _ET2 = 0x00ad 00AE 423 _ES1 = 0x00ae 00AF 424 _EA = 0x00af 00B8 425 _PX0 = 0x00b8 00B9 426 _PT0 = 0x00b9 00BA 427 _PX1 = 0x00ba 00BB 428 _PT1 = 0x00bb 00BC 429 _PS0 = 0x00bc 00BD 430 _PT2 = 0x00bd 00BE 431 _PS1 = 0x00be 00C0 432 _RI1 = 0x00c0 00C1 433 _TI1 = 0x00c1 00C2 434 _RB81 = 0x00c2 00C3 435 _TB81 = 0x00c3 00C4 436 _REN1 = 0x00c4 00C5 437 _SM21 = 0x00c5 00C6 438 _SM11 = 0x00c6 00C7 439 _SM01 = 0x00c7 00C8 440 _CP_RL2 = 0x00c8 00C9 441 _C_T2 = 0x00c9 00CA 442 _TR2 = 0x00ca 00CB 443 _EXEN2 = 0x00cb 00CC 444 _TCLK = 0x00cc 00CD 445 _RCLK = 0x00cd 00CE 446 _EXF2 = 0x00ce 00CF 447 _TF2 = 0x00cf 00D0 448 _P = 0x00d0 00D1 449 _FL = 0x00d1 00D2 450 _OV = 0x00d2 00D3 451 _RS0 = 0x00d3 00D4 452 _RS1 = 0x00d4 00D5 453 _F0 = 0x00d5 00D6 454 _AC = 0x00d6 00D7 455 _CY = 0x00d7 00DB 456 _INT6 = 0x00db 00DC 457 _RESI = 0x00dc 00DD 458 _ERESI = 0x00dd 00DF 459 _SMOD1 = 0x00df 00E8 460 _EIUSB = 0x00e8 00E9 461 _EI2C = 0x00e9 00EA 462 _EIEX4 = 0x00ea 00EB 463 _EIEX5 = 0x00eb 00EC 464 _EIEX6 = 0x00ec 00F8 465 _PUSB = 0x00f8 00F9 466 _PI2C = 0x00f9 00FA 467 _EIPX4 = 0x00fa 00FB 468 _EIPX5 = 0x00fb 00FC 469 _EIPX6 = 0x00fc 0080 470 _bitS_CLK = 0x0080 0081 471 _bitS_OUT = 0x0081 0082 472 _bitS_IN = 0x0082 00A1 473 _bitALTERA_DATA0 = 0x00a1 00A3 474 _bitALTERA_DCLK = 0x00a3 475 ;-------------------------------------------------------- 476 ; overlayable register banks 477 ;-------------------------------------------------------- 478 .area REG_BANK_0 (REL,OVR,DATA) 0000 479 .ds 8 480 ;-------------------------------------------------------- 481 ; internal ram data 482 ;-------------------------------------------------------- 483 .area DSEG (DATA) 0000 484 _g_tx_enable:: 0000 485 .ds 1 0001 486 _g_rx_enable:: 0001 487 .ds 1 0002 488 _g_rx_overrun:: 0002 489 .ds 1 0003 490 _g_tx_underrun:: 0003 491 .ds 1 0004 492 _isr_tick_count_1_1: 0004 493 .ds 1 494 ;-------------------------------------------------------- 495 ; overlayable items in internal ram 496 ;-------------------------------------------------------- 497 .area OSEG (OVR,DATA) 498 ;-------------------------------------------------------- 499 ; Stack segment in internal ram 500 ;-------------------------------------------------------- 501 .area SSEG (DATA) 0000 502 __start__stack: 0000 503 .ds 1 504 505 ;-------------------------------------------------------- 506 ; indirectly addressable internal ram data 507 ;-------------------------------------------------------- 508 .area ISEG (DATA) 509 ;-------------------------------------------------------- 510 ; absolute internal ram data 511 ;-------------------------------------------------------- 512 .area IABS (ABS,DATA) 513 .area IABS (ABS,DATA) 514 ;-------------------------------------------------------- 515 ; bit data 516 ;-------------------------------------------------------- 517 .area BSEG (BIT) 518 ;-------------------------------------------------------- 519 ; paged external ram data 520 ;-------------------------------------------------------- 521 .area PSEG (PAG,XDATA) 522 ;-------------------------------------------------------- 523 ; external ram data 524 ;-------------------------------------------------------- 525 .area XSEG (XDATA) E400 526 _GPIF_WAVE_DATA = 0xe400 E480 527 _RES_WAVEDATA_END = 0xe480 E600 528 _CPUCS = 0xe600 E601 529 _IFCONFIG = 0xe601 E602 530 _PINFLAGSAB = 0xe602 E603 531 _PINFLAGSCD = 0xe603 E604 532 _FIFORESET = 0xe604 E605 533 _BREAKPT = 0xe605 E606 534 _BPADDRH = 0xe606 E607 535 _BPADDRL = 0xe607 E608 536 _UART230 = 0xe608 E609 537 _FIFOPINPOLAR = 0xe609 E60A 538 _REVID = 0xe60a E60B 539 _REVCTL = 0xe60b E610 540 _EP1OUTCFG = 0xe610 E611 541 _EP1INCFG = 0xe611 E612 542 _EP2CFG = 0xe612 E613 543 _EP4CFG = 0xe613 E614 544 _EP6CFG = 0xe614 E615 545 _EP8CFG = 0xe615 E618 546 _EP2FIFOCFG = 0xe618 E619 547 _EP4FIFOCFG = 0xe619 E61A 548 _EP6FIFOCFG = 0xe61a E61B 549 _EP8FIFOCFG = 0xe61b E620 550 _EP2AUTOINLENH = 0xe620 E621 551 _EP2AUTOINLENL = 0xe621 E622 552 _EP4AUTOINLENH = 0xe622 E623 553 _EP4AUTOINLENL = 0xe623 E624 554 _EP6AUTOINLENH = 0xe624 E625 555 _EP6AUTOINLENL = 0xe625 E626 556 _EP8AUTOINLENH = 0xe626 E627 557 _EP8AUTOINLENL = 0xe627 E630 558 _EP2FIFOPFH = 0xe630 E631 559 _EP2FIFOPFL = 0xe631 E632 560 _EP4FIFOPFH = 0xe632 E633 561 _EP4FIFOPFL = 0xe633 E634 562 _EP6FIFOPFH = 0xe634 E635 563 _EP6FIFOPFL = 0xe635 E636 564 _EP8FIFOPFH = 0xe636 E637 565 _EP8FIFOPFL = 0xe637 E640 566 _EP2ISOINPKTS = 0xe640 E641 567 _EP4ISOINPKTS = 0xe641 E642 568 _EP6ISOINPKTS = 0xe642 E643 569 _EP8ISOINPKTS = 0xe643 E648 570 _INPKTEND = 0xe648 E649 571 _OUTPKTEND = 0xe649 E650 572 _EP2FIFOIE = 0xe650 E651 573 _EP2FIFOIRQ = 0xe651 E652 574 _EP4FIFOIE = 0xe652 E653 575 _EP4FIFOIRQ = 0xe653 E654 576 _EP6FIFOIE = 0xe654 E655 577 _EP6FIFOIRQ = 0xe655 E656 578 _EP8FIFOIE = 0xe656 E657 579 _EP8FIFOIRQ = 0xe657 E658 580 _IBNIE = 0xe658 E659 581 _IBNIRQ = 0xe659 E65A 582 _NAKIE = 0xe65a E65B 583 _NAKIRQ = 0xe65b E65C 584 _USBIE = 0xe65c E65D 585 _USBIRQ = 0xe65d E65E 586 _EPIE = 0xe65e E65F 587 _EPIRQ = 0xe65f E660 588 _GPIFIE = 0xe660 E661 589 _GPIFIRQ = 0xe661 E662 590 _USBERRIE = 0xe662 E663 591 _USBERRIRQ = 0xe663 E664 592 _ERRCNTLIM = 0xe664 E665 593 _CLRERRCNT = 0xe665 E666 594 _INT2IVEC = 0xe666 E667 595 _INT4IVEC = 0xe667 E668 596 _INTSETUP = 0xe668 E670 597 _PORTACFG = 0xe670 E671 598 _PORTCCFG = 0xe671 E672 599 _PORTECFG = 0xe672 E678 600 _I2CS = 0xe678 E679 601 _I2DAT = 0xe679 E67A 602 _I2CTL = 0xe67a E67B 603 _XAUTODAT1 = 0xe67b E67C 604 _XAUTODAT2 = 0xe67c E680 605 _USBCS = 0xe680 E681 606 _SUSPEND = 0xe681 E682 607 _WAKEUPCS = 0xe682 E683 608 _TOGCTL = 0xe683 E684 609 _USBFRAMEH = 0xe684 E685 610 _USBFRAMEL = 0xe685 E686 611 _MICROFRAME = 0xe686 E687 612 _FNADDR = 0xe687 E68A 613 _EP0BCH = 0xe68a E68B 614 _EP0BCL = 0xe68b E68D 615 _EP1OUTBC = 0xe68d E68F 616 _EP1INBC = 0xe68f E690 617 _EP2BCH = 0xe690 E691 618 _EP2BCL = 0xe691 E694 619 _EP4BCH = 0xe694 E695 620 _EP4BCL = 0xe695 E698 621 _EP6BCH = 0xe698 E699 622 _EP6BCL = 0xe699 E69C 623 _EP8BCH = 0xe69c E69D 624 _EP8BCL = 0xe69d E6A0 625 _EP0CS = 0xe6a0 E6A1 626 _EP1OUTCS = 0xe6a1 E6A2 627 _EP1INCS = 0xe6a2 E6A3 628 _EP2CS = 0xe6a3 E6A4 629 _EP4CS = 0xe6a4 E6A5 630 _EP6CS = 0xe6a5 E6A6 631 _EP8CS = 0xe6a6 E6A7 632 _EP2FIFOFLGS = 0xe6a7 E6A8 633 _EP4FIFOFLGS = 0xe6a8 E6A9 634 _EP6FIFOFLGS = 0xe6a9 E6AA 635 _EP8FIFOFLGS = 0xe6aa E6AB 636 _EP2FIFOBCH = 0xe6ab E6AC 637 _EP2FIFOBCL = 0xe6ac E6AD 638 _EP4FIFOBCH = 0xe6ad E6AE 639 _EP4FIFOBCL = 0xe6ae E6AF 640 _EP6FIFOBCH = 0xe6af E6B0 641 _EP6FIFOBCL = 0xe6b0 E6B1 642 _EP8FIFOBCH = 0xe6b1 E6B2 643 _EP8FIFOBCL = 0xe6b2 E6B3 644 _SUDPTRH = 0xe6b3 E6B4 645 _SUDPTRL = 0xe6b4 E6B5 646 _SUDPTRCTL = 0xe6b5 E6B8 647 _SETUPDAT = 0xe6b8 E6C0 648 _GPIFWFSELECT = 0xe6c0 E6C1 649 _GPIFIDLECS = 0xe6c1 E6C2 650 _GPIFIDLECTL = 0xe6c2 E6C3 651 _GPIFCTLCFG = 0xe6c3 E6C4 652 _GPIFADRH = 0xe6c4 E6C5 653 _GPIFADRL = 0xe6c5 E6CE 654 _GPIFTCB3 = 0xe6ce E6CF 655 _GPIFTCB2 = 0xe6cf E6D0 656 _GPIFTCB1 = 0xe6d0 E6D1 657 _GPIFTCB0 = 0xe6d1 E6D2 658 _EP2GPIFFLGSEL = 0xe6d2 E6D3 659 _EP2GPIFPFSTOP = 0xe6d3 E6D4 660 _EP2GPIFTRIG = 0xe6d4 E6DA 661 _EP4GPIFFLGSEL = 0xe6da E6DB 662 _EP4GPIFPFSTOP = 0xe6db E6DC 663 _EP4GPIFTRIG = 0xe6dc E6E2 664 _EP6GPIFFLGSEL = 0xe6e2 E6E3 665 _EP6GPIFPFSTOP = 0xe6e3 E6E4 666 _EP6GPIFTRIG = 0xe6e4 E6EA 667 _EP8GPIFFLGSEL = 0xe6ea E6EB 668 _EP8GPIFPFSTOP = 0xe6eb E6EC 669 _EP8GPIFTRIG = 0xe6ec E6F0 670 _XGPIFSGLDATH = 0xe6f0 E6F1 671 _XGPIFSGLDATLX = 0xe6f1 E6F2 672 _XGPIFSGLDATLNOX = 0xe6f2 E6F3 673 _GPIFREADYCFG = 0xe6f3 E6F4 674 _GPIFREADYSTAT = 0xe6f4 E6F5 675 _GPIFABORT = 0xe6f5 E6C6 676 _FLOWSTATE = 0xe6c6 E6C7 677 _FLOWLOGIC = 0xe6c7 E6C8 678 _FLOWEQ0CTL = 0xe6c8 E6C9 679 _FLOWEQ1CTL = 0xe6c9 E6CA 680 _FLOWHOLDOFF = 0xe6ca E6CB 681 _FLOWSTB = 0xe6cb E6CC 682 _FLOWSTBEDGE = 0xe6cc E6CD 683 _FLOWSTBHPERIOD = 0xe6cd E60C 684 _GPIFHOLDAMOUNT = 0xe60c E67D 685 _UDMACRCH = 0xe67d E67E 686 _UDMACRCL = 0xe67e E67F 687 _UDMACRCQUAL = 0xe67f E6F8 688 _DBUG = 0xe6f8 E6F9 689 _TESTCFG = 0xe6f9 E6FA 690 _USBTEST = 0xe6fa E6FB 691 _CT1 = 0xe6fb E6FC 692 _CT2 = 0xe6fc E6FD 693 _CT3 = 0xe6fd E6FE 694 _CT4 = 0xe6fe E740 695 _EP0BUF = 0xe740 E780 696 _EP1OUTBUF = 0xe780 E7C0 697 _EP1INBUF = 0xe7c0 F000 698 _EP2FIFOBUF = 0xf000 F400 699 _EP4FIFOBUF = 0xf400 F800 700 _EP6FIFOBUF = 0xf800 FC00 701 _EP8FIFOBUF = 0xfc00 E1F0 702 _hash1 = 0xe1f0 0000 703 _patch_usb_descriptors_hw_rev_1_1: 0000 704 .ds 1 0001 705 _patch_usb_descriptors_serial_no_1_1: 0001 706 .ds 8 707 ;-------------------------------------------------------- 708 ; absolute external ram data 709 ;-------------------------------------------------------- 710 .area XABS (ABS,XDATA) 711 ;-------------------------------------------------------- 712 ; external initialized ram data 713 ;-------------------------------------------------------- 714 .area HOME (CODE) 715 .area GSINIT0 (CODE) 716 .area GSINIT1 (CODE) 717 .area GSINIT2 (CODE) 718 .area GSINIT3 (CODE) 719 .area GSINIT4 (CODE) 720 .area GSINIT5 (CODE) 721 .area GSINIT (CODE) 722 .area GSFINAL (CODE) 723 .area CSEG (CODE) 724 ;-------------------------------------------------------- 725 ; interrupt vector 726 ;-------------------------------------------------------- 727 .area HOME (CODE) 0000 728 __interrupt_vect: 0000 02s00r00 729 ljmp __sdcc_gsinit_startup 730 ;-------------------------------------------------------- 731 ; global & static initialisations 732 ;-------------------------------------------------------- 733 .area HOME (CODE) 734 .area GSINIT (CODE) 735 .area GSFINAL (CODE) 736 .area GSINIT (CODE) 737 .globl __sdcc_gsinit_startup 738 .globl __sdcc_program_startup 739 .globl __start__stack 740 .globl __mcs51_genRAMCLEAR 741 ;------------------------------------------------------------ 742 ;Allocation info for local variables in function 'isr_tick' 743 ;------------------------------------------------------------ 744 ;count Allocated with name '_isr_tick_count_1_1' 745 ;------------------------------------------------------------ 746 ; usrp_main.c:309: static unsigned char count = 1; 0000 75*04 01 747 mov _isr_tick_count_1_1,#0x01 748 ; usrp_main.c:55: unsigned char g_tx_enable = 0; 0003 75*00 00 749 mov _g_tx_enable,#0x00 750 ; usrp_main.c:56: unsigned char g_rx_enable = 0; 0006 75*01 00 751 mov _g_rx_enable,#0x00 752 ; usrp_main.c:57: unsigned char g_rx_overrun = 0; 0009 75*02 00 753 mov _g_rx_overrun,#0x00 754 ; usrp_main.c:58: unsigned char g_tx_underrun = 0; 000C 75*03 00 755 mov _g_tx_underrun,#0x00 756 .area GSFINAL (CODE) 0000 02s00r03 757 ljmp __sdcc_program_startup 758 ;-------------------------------------------------------- 759 ; Home 760 ;-------------------------------------------------------- 761 .area HOME (CODE) 762 .area HOME (CODE) 0003 763 __sdcc_program_startup: 0003 12s03r4F 764 lcall _main 765 ; return from main will lock up 0006 80 FE 766 sjmp . 767 ;-------------------------------------------------------- 768 ; code 769 ;-------------------------------------------------------- 770 .area CSEG (CODE) 771 ;------------------------------------------------------------ 772 ;Allocation info for local variables in function 'get_ep0_data' 773 ;------------------------------------------------------------ 774 ;------------------------------------------------------------ 775 ; usrp_main.c:68: get_ep0_data (void) 776 ; ----------------------------------------- 777 ; function get_ep0_data 778 ; ----------------------------------------- 0000 779 _get_ep0_data: 0002 780 ar2 = 0x02 0003 781 ar3 = 0x03 0004 782 ar4 = 0x04 0005 783 ar5 = 0x05 0006 784 ar6 = 0x06 0007 785 ar7 = 0x07 0000 786 ar0 = 0x00 0001 787 ar1 = 0x01 788 ; usrp_main.c:70: EP0BCL = 0; // arm EP0 for OUT xfer. This sets the busy bit 0000 90 E6 8B 789 mov dptr,#_EP0BCL 0003 E4 790 clr a 0004 F0 791 movx @dptr,a 792 ; usrp_main.c:72: while (EP0CS & bmEPBUSY) // wait for busy to clear 0005 793 00101$: 0005 90 E6 A0 794 mov dptr,#_EP0CS 0008 E0 795 movx a,@dptr 0009 FA 796 mov r2,a 000A 20 E1 F8 797 jb acc.1,00101$ 000D 22 798 ret 799 ;------------------------------------------------------------ 800 ;Allocation info for local variables in function 'app_vendor_cmd' 801 ;------------------------------------------------------------ 802 ;------------------------------------------------------------ 803 ; usrp_main.c:81: app_vendor_cmd (void) 804 ; ----------------------------------------- 805 ; function app_vendor_cmd 806 ; ----------------------------------------- 000E 807 _app_vendor_cmd: 808 ; usrp_main.c:83: if (bRequestType == VRT_VENDOR_IN){ 000E 90 E6 B8 809 mov dptr,#_SETUPDAT 0011 E0 810 movx a,@dptr 0012 FA 811 mov r2,a 0013 BA C0 02 812 cjne r2,#0xC0,00163$ 0016 80 03 813 sjmp 00164$ 0018 814 00163$: 0018 02s00rE3 815 ljmp 00142$ 001B 816 00164$: 817 ; usrp_main.c:89: switch (bRequest){ 001B 90 E6 B9 818 mov dptr,#(_SETUPDAT + 0x0001) 001E E0 819 movx a,@dptr 001F FA 820 mov r2,a 0020 BA 80 02 821 cjne r2,#0x80,00165$ 0023 80 0E 822 sjmp 00101$ 0025 823 00165$: 0025 BA 81 02 824 cjne r2,#0x81,00166$ 0028 80 47 825 sjmp 00106$ 002A 826 00166$: 002A BA 82 03 827 cjne r2,#0x82,00167$ 002D 02s00r9F 828 ljmp 00109$ 0030 829 00167$: 0030 02s00rDF 830 ljmp 00112$ 831 ; usrp_main.c:91: case VRQ_GET_STATUS: 0033 832 00101$: 833 ; usrp_main.c:92: switch (wIndexL){ 0033 90 E6 BC 834 mov dptr,#(_SETUPDAT + 0x0004) 0036 E0 835 movx a,@dptr 0037 FA 836 mov r2,a 0038 60 05 837 jz 00102$ 838 ; usrp_main.c:94: case GS_TX_UNDERRUN: 003A BA 01 30 839 cjne r2,#0x01,00104$ 003D 80 17 840 sjmp 00103$ 003F 841 00102$: 842 ; usrp_main.c:95: EP0BUF[0] = g_tx_underrun; 003F 90 E7 40 843 mov dptr,#_EP0BUF 0042 E5*03 844 mov a,_g_tx_underrun 0044 F0 845 movx @dptr,a 846 ; usrp_main.c:96: g_tx_underrun = 0; 0045 75*03 00 847 mov _g_tx_underrun,#0x00 848 ; usrp_main.c:97: EP0BCH = 0; 0048 90 E6 8A 849 mov dptr,#_EP0BCH 004B E4 850 clr a 004C F0 851 movx @dptr,a 852 ; usrp_main.c:98: EP0BCL = 1; 004D 90 E6 8B 853 mov dptr,#_EP0BCL 0050 74 01 854 mov a,#0x01 0052 F0 855 movx @dptr,a 856 ; usrp_main.c:99: break; 0053 02s02r0D 857 ljmp 00143$ 858 ; usrp_main.c:101: case GS_RX_OVERRUN: 0056 859 00103$: 860 ; usrp_main.c:102: EP0BUF[0] = g_rx_overrun; 0056 90 E7 40 861 mov dptr,#_EP0BUF 0059 E5*02 862 mov a,_g_rx_overrun 005B F0 863 movx @dptr,a 864 ; usrp_main.c:103: g_rx_overrun = 0; 005C 75*02 00 865 mov _g_rx_overrun,#0x00 866 ; usrp_main.c:104: EP0BCH = 0; 005F 90 E6 8A 867 mov dptr,#_EP0BCH 0062 E4 868 clr a 0063 F0 869 movx @dptr,a 870 ; usrp_main.c:105: EP0BCL = 1; 0064 90 E6 8B 871 mov dptr,#_EP0BCL 0067 74 01 872 mov a,#0x01 0069 F0 873 movx @dptr,a 874 ; usrp_main.c:106: break; 006A 02s02r0D 875 ljmp 00143$ 876 ; usrp_main.c:108: default: 006D 877 00104$: 878 ; usrp_main.c:109: return 0; 006D 75 82 00 879 mov dpl,#0x00 0070 22 880 ret 881 ; usrp_main.c:113: case VRQ_I2C_READ: 0071 882 00106$: 883 ; usrp_main.c:114: if (!i2c_read (wValueL, EP0BUF, wLengthL)) 0071 90 E6 BA 884 mov dptr,#(_SETUPDAT + 0x0002) 0074 E0 885 movx a,@dptr 0075 FA 886 mov r2,a 0076 75*00 40 887 mov _i2c_read_PARM_2,#_EP0BUF 0079 75*01 E7 888 mov (_i2c_read_PARM_2 + 1),#(_EP0BUF >> 8) 007C 90 E6 BE 889 mov dptr,#(_SETUPDAT + 0x0006) 007F E0 890 movx a,@dptr 0080 F5*00 891 mov _i2c_read_PARM_3,a 0082 8A 82 892 mov dpl,r2 0084 12s00r00 893 lcall _i2c_read 0087 E5 82 894 mov a,dpl 895 ; usrp_main.c:115: return 0; 0089 70 03 896 jnz 00108$ 008B F5 82 897 mov dpl,a 008D 22 898 ret 008E 899 00108$: 900 ; usrp_main.c:117: EP0BCH = 0; 008E 90 E6 8A 901 mov dptr,#_EP0BCH 0091 E4 902 clr a 0092 F0 903 movx @dptr,a 904 ; usrp_main.c:118: EP0BCL = wLengthL; 0093 90 E6 BE 905 mov dptr,#(_SETUPDAT + 0x0006) 0096 E0 906 movx a,@dptr 0097 FA 907 mov r2,a 0098 90 E6 8B 908 mov dptr,#_EP0BCL 009B F0 909 movx @dptr,a 910 ; usrp_main.c:119: break; 009C 02s02r0D 911 ljmp 00143$ 912 ; usrp_main.c:121: case VRQ_SPI_READ: 009F 913 00109$: 914 ; usrp_main.c:122: if (!spi_read (wValueH, wValueL, wIndexH, wIndexL, EP0BUF, wLengthL)) 009F 90 E6 BB 915 mov dptr,#(_SETUPDAT + 0x0003) 00A2 E0 916 movx a,@dptr 00A3 FA 917 mov r2,a 00A4 90 E6 BA 918 mov dptr,#(_SETUPDAT + 0x0002) 00A7 E0 919 movx a,@dptr 00A8 F5*00 920 mov _spi_read_PARM_2,a 00AA 90 E6 BD 921 mov dptr,#(_SETUPDAT + 0x0005) 00AD E0 922 movx a,@dptr 00AE F5*00 923 mov _spi_read_PARM_3,a 00B0 90 E6 BC 924 mov dptr,#(_SETUPDAT + 0x0004) 00B3 E0 925 movx a,@dptr 00B4 F5*00 926 mov _spi_read_PARM_4,a 00B6 75*00 40 927 mov _spi_read_PARM_5,#_EP0BUF 00B9 75*01 E7 928 mov (_spi_read_PARM_5 + 1),#(_EP0BUF >> 8) 00BC 90 E6 BE 929 mov dptr,#(_SETUPDAT + 0x0006) 00BF E0 930 movx a,@dptr 00C0 F5*00 931 mov _spi_read_PARM_6,a 00C2 8A 82 932 mov dpl,r2 00C4 12s00r00 933 lcall _spi_read 00C7 E5 82 934 mov a,dpl 935 ; usrp_main.c:123: return 0; 00C9 70 03 936 jnz 00111$ 00CB F5 82 937 mov dpl,a 00CD 22 938 ret 00CE 939 00111$: 940 ; usrp_main.c:125: EP0BCH = 0; 00CE 90 E6 8A 941 mov dptr,#_EP0BCH 00D1 E4 942 clr a 00D2 F0 943 movx @dptr,a 944 ; usrp_main.c:126: EP0BCL = wLengthL; 00D3 90 E6 BE 945 mov dptr,#(_SETUPDAT + 0x0006) 00D6 E0 946 movx a,@dptr 00D7 FA 947 mov r2,a 00D8 90 E6 8B 948 mov dptr,#_EP0BCL 00DB F0 949 movx @dptr,a 950 ; usrp_main.c:127: break; 00DC 02s02r0D 951 ljmp 00143$ 952 ; usrp_main.c:129: default: 00DF 953 00112$: 954 ; usrp_main.c:130: return 0; 00DF 75 82 00 955 mov dpl,#0x00 00E2 22 956 ret 957 ; usrp_main.c:131: } 00E3 958 00142$: 959 ; usrp_main.c:134: else if (bRequestType == VRT_VENDOR_OUT){ 00E3 90 E6 B8 960 mov dptr,#_SETUPDAT 00E6 E0 961 movx a,@dptr 00E7 FA 962 mov r2,a 00E8 BA 40 02 963 cjne r2,#0x40,00172$ 00EB 80 03 964 sjmp 00173$ 00ED 965 00172$: 00ED 02s02r09 966 ljmp 00139$ 00F0 967 00173$: 968 ; usrp_main.c:140: switch (bRequest){ 00F0 90 E6 B9 969 mov dptr,#(_SETUPDAT + 0x0001) 00F3 E0 970 movx a,@dptr 00F4 FA 971 mov r2,a 00F5 24 F4 972 add a,#0xff - 0x0B 00F7 50 03 973 jnc 00174$ 00F9 02s02r05 974 ljmp 00136$ 00FC 975 00174$: 00FC EA 976 mov a,r2 00FD 2A 977 add a,r2 00FE 2A 978 add a,r2 00FF 90s01r03 979 mov dptr,#00175$ 0102 73 980 jmp @a+dptr 0103 981 00175$: 0103 02s02r05 982 ljmp 00136$ 0106 02s01r27 983 ljmp 00114$ 0109 02s01r4F 984 ljmp 00119$ 010C 02s02r05 985 ljmp 00136$ 010F 02s01r79 986 ljmp 00125$ 0112 02s01r85 987 ljmp 00126$ 0115 02s01r91 988 ljmp 00127$ 0118 02s02r05 989 ljmp 00136$ 011B 02s01rB3 990 ljmp 00130$ 011E 02s01rD3 991 ljmp 00133$ 0121 02s01r9D 992 ljmp 00128$ 0124 02s01rA8 993 ljmp 00129$ 994 ; usrp_main.c:142: case VRQ_SET_LED: 0127 995 00114$: 996 ; usrp_main.c:143: switch (wIndexL){ 0127 90 E6 BC 997 mov dptr,#(_SETUPDAT + 0x0004) 012A E0 998 movx a,@dptr 012B FA 999 mov r2,a 012C 60 05 1000 jz 00115$ 1001 ; usrp_main.c:144: case 0: 012E BA 01 1A 1002 cjne r2,#0x01,00117$ 0131 80 0C 1003 sjmp 00116$ 0133 1004 00115$: 1005 ; usrp_main.c:145: set_led_0 (wValueL); 0133 90 E6 BA 1006 mov dptr,#(_SETUPDAT + 0x0002) 0136 E0 1007 movx a,@dptr 0137 F5 82 1008 mov dpl,a 0139 12s00r00 1009 lcall _set_led_0 1010 ; usrp_main.c:146: break; 013C 02s02r0D 1011 ljmp 00143$ 1012 ; usrp_main.c:148: case 1: 013F 1013 00116$: 1014 ; usrp_main.c:149: set_led_1 (wValueL); 013F 90 E6 BA 1015 mov dptr,#(_SETUPDAT + 0x0002) 0142 E0 1016 movx a,@dptr 0143 F5 82 1017 mov dpl,a 0145 12s00r00 1018 lcall _set_led_1 1019 ; usrp_main.c:150: break; 0148 02s02r0D 1020 ljmp 00143$ 1021 ; usrp_main.c:152: default: 014B 1022 00117$: 1023 ; usrp_main.c:153: return 0; 014B 75 82 00 1024 mov dpl,#0x00 014E 22 1025 ret 1026 ; usrp_main.c:157: case VRQ_FPGA_LOAD: 014F 1027 00119$: 1028 ; usrp_main.c:158: switch (wIndexL){ // sub-command 014F 90 E6 BC 1029 mov dptr,#(_SETUPDAT + 0x0004) 0152 E0 1030 movx a,@dptr 0153 FA 1031 mov r2,a 0154 60 0A 1032 jz 00120$ 0156 BA 01 02 1033 cjne r2,#0x01,00179$ 0159 80 08 1034 sjmp 00121$ 015B 1035 00179$: 1036 ; usrp_main.c:159: case FL_BEGIN: 015B BA 02 17 1037 cjne r2,#0x02,00123$ 015E 80 12 1038 sjmp 00122$ 0160 1039 00120$: 1040 ; usrp_main.c:160: return fpga_load_begin (); 0160 02s00r00 1041 ljmp _fpga_load_begin 1042 ; usrp_main.c:162: case FL_XFER: 0163 1043 00121$: 1044 ; usrp_main.c:163: get_ep0_data (); 0163 12s00r00 1045 lcall _get_ep0_data 1046 ; usrp_main.c:164: return fpga_load_xfer (EP0BUF, EP0BCL); 0166 90 E6 8B 1047 mov dptr,#_EP0BCL 0169 E0 1048 movx a,@dptr 016A F5*00 1049 mov _fpga_load_xfer_PARM_2,a 016C 90 E7 40 1050 mov dptr,#_EP0BUF 016F 02s00r00 1051 ljmp _fpga_load_xfer 1052 ; usrp_main.c:166: case FL_END: 0172 1053 00122$: 1054 ; usrp_main.c:167: return fpga_load_end (); 0172 02s00r00 1055 ljmp _fpga_load_end 1056 ; usrp_main.c:169: default: 0175 1057 00123$: 1058 ; usrp_main.c:170: return 0; 0175 75 82 00 1059 mov dpl,#0x00 0178 22 1060 ret 1061 ; usrp_main.c:175: case VRQ_FPGA_SET_RESET: 0179 1062 00125$: 1063 ; usrp_main.c:176: fpga_set_reset (wValueL); 0179 90 E6 BA 1064 mov dptr,#(_SETUPDAT + 0x0002) 017C E0 1065 movx a,@dptr 017D F5 82 1066 mov dpl,a 017F 12s00r00 1067 lcall _fpga_set_reset 1068 ; usrp_main.c:177: break; 0182 02s02r0D 1069 ljmp 00143$ 1070 ; usrp_main.c:179: case VRQ_FPGA_SET_TX_ENABLE: 0185 1071 00126$: 1072 ; usrp_main.c:180: fpga_set_tx_enable (wValueL); 0185 90 E6 BA 1073 mov dptr,#(_SETUPDAT + 0x0002) 0188 E0 1074 movx a,@dptr 0189 F5 82 1075 mov dpl,a 018B 12s00r00 1076 lcall _fpga_set_tx_enable 1077 ; usrp_main.c:181: break; 018E 02s02r0D 1078 ljmp 00143$ 1079 ; usrp_main.c:183: case VRQ_FPGA_SET_RX_ENABLE: 0191 1080 00127$: 1081 ; usrp_main.c:184: fpga_set_rx_enable (wValueL); 0191 90 E6 BA 1082 mov dptr,#(_SETUPDAT + 0x0002) 0194 E0 1083 movx a,@dptr 0195 F5 82 1084 mov dpl,a 0197 12s00r00 1085 lcall _fpga_set_rx_enable 1086 ; usrp_main.c:185: break; 019A 02s02r0D 1087 ljmp 00143$ 1088 ; usrp_main.c:187: case VRQ_FPGA_SET_TX_RESET: 019D 1089 00128$: 1090 ; usrp_main.c:188: fpga_set_tx_reset (wValueL); 019D 90 E6 BA 1091 mov dptr,#(_SETUPDAT + 0x0002) 01A0 E0 1092 movx a,@dptr 01A1 F5 82 1093 mov dpl,a 01A3 12s00r00 1094 lcall _fpga_set_tx_reset 1095 ; usrp_main.c:189: break; 1096 ; usrp_main.c:191: case VRQ_FPGA_SET_RX_RESET: 01A6 80 65 1097 sjmp 00143$ 01A8 1098 00129$: 1099 ; usrp_main.c:192: fpga_set_rx_reset (wValueL); 01A8 90 E6 BA 1100 mov dptr,#(_SETUPDAT + 0x0002) 01AB E0 1101 movx a,@dptr 01AC F5 82 1102 mov dpl,a 01AE 12s00r00 1103 lcall _fpga_set_rx_reset 1104 ; usrp_main.c:193: break; 1105 ; usrp_main.c:195: case VRQ_I2C_WRITE: 01B1 80 5A 1106 sjmp 00143$ 01B3 1107 00130$: 1108 ; usrp_main.c:196: get_ep0_data (); 01B3 12s00r00 1109 lcall _get_ep0_data 1110 ; usrp_main.c:197: if (!i2c_write (wValueL, EP0BUF, EP0BCL)) 01B6 90 E6 BA 1111 mov dptr,#(_SETUPDAT + 0x0002) 01B9 E0 1112 movx a,@dptr 01BA FA 1113 mov r2,a 01BB 75*00 40 1114 mov _i2c_write_PARM_2,#_EP0BUF 01BE 75*01 E7 1115 mov (_i2c_write_PARM_2 + 1),#(_EP0BUF >> 8) 01C1 90 E6 8B 1116 mov dptr,#_EP0BCL 01C4 E0 1117 movx a,@dptr 01C5 F5*00 1118 mov _i2c_write_PARM_3,a 01C7 8A 82 1119 mov dpl,r2 01C9 12s00r00 1120 lcall _i2c_write 01CC E5 82 1121 mov a,dpl 1122 ; usrp_main.c:198: return 0; 01CE 70 3D 1123 jnz 00143$ 01D0 F5 82 1124 mov dpl,a 1125 ; usrp_main.c:201: case VRQ_SPI_WRITE: 01D2 22 1126 ret 01D3 1127 00133$: 1128 ; usrp_main.c:202: get_ep0_data (); 01D3 12s00r00 1129 lcall _get_ep0_data 1130 ; usrp_main.c:203: if (!spi_write (wValueH, wValueL, wIndexH, wIndexL, EP0BUF, EP0BCL)) 01D6 90 E6 BB 1131 mov dptr,#(_SETUPDAT + 0x0003) 01D9 E0 1132 movx a,@dptr 01DA FA 1133 mov r2,a 01DB 90 E6 BA 1134 mov dptr,#(_SETUPDAT + 0x0002) 01DE E0 1135 movx a,@dptr 01DF F5*00 1136 mov _spi_write_PARM_2,a 01E1 90 E6 BD 1137 mov dptr,#(_SETUPDAT + 0x0005) 01E4 E0 1138 movx a,@dptr 01E5 F5*00 1139 mov _spi_write_PARM_3,a 01E7 90 E6 BC 1140 mov dptr,#(_SETUPDAT + 0x0004) 01EA E0 1141 movx a,@dptr 01EB F5*00 1142 mov _spi_write_PARM_4,a 01ED 75*00 40 1143 mov _spi_write_PARM_5,#_EP0BUF 01F0 75*01 E7 1144 mov (_spi_write_PARM_5 + 1),#(_EP0BUF >> 8) 01F3 90 E6 8B 1145 mov dptr,#_EP0BCL 01F6 E0 1146 movx a,@dptr 01F7 F5*00 1147 mov _spi_write_PARM_6,a 01F9 8A 82 1148 mov dpl,r2 01FB 12s00r00 1149 lcall _spi_write 01FE E5 82 1150 mov a,dpl 1151 ; usrp_main.c:204: return 0; 0200 70 0B 1152 jnz 00143$ 0202 F5 82 1153 mov dpl,a 1154 ; usrp_main.c:207: default: 0204 22 1155 ret 0205 1156 00136$: 1157 ; usrp_main.c:208: return 0; 0205 75 82 00 1158 mov dpl,#0x00 1159 ; usrp_main.c:209: } 0208 22 1160 ret 0209 1161 00139$: 1162 ; usrp_main.c:213: return 0; // invalid bRequestType 0209 75 82 00 1163 mov dpl,#0x00 1164 ; usrp_main.c:215: return 1; 020C 22 1165 ret 020D 1166 00143$: 020D 75 82 01 1167 mov dpl,#0x01 0210 22 1168 ret 1169 ;------------------------------------------------------------ 1170 ;Allocation info for local variables in function 'main_loop' 1171 ;------------------------------------------------------------ 1172 ;------------------------------------------------------------ 1173 ; usrp_main.c:221: main_loop (void) 1174 ; ----------------------------------------- 1175 ; function main_loop 1176 ; ----------------------------------------- 0211 1177 _main_loop: 1178 ; usrp_main.c:223: setup_flowstate_common (); 0211 90 E6 C6 1179 mov dptr,#_FLOWSTATE 0214 74 81 1180 mov a,#0x81 0216 F0 1181 movx @dptr,a 0217 90 E6 C7 1182 mov dptr,#_FLOWLOGIC 021A 74 2D 1183 mov a,#0x2D 021C F0 1184 movx @dptr,a 021D 90 E6 C8 1185 mov dptr,#_FLOWEQ0CTL 0220 74 26 1186 mov a,#0x26 0222 F0 1187 movx @dptr,a 0223 90 E6 C9 1188 mov dptr,#_FLOWEQ1CTL 0226 E4 1189 clr a 0227 F0 1190 movx @dptr,a 0228 90 E6 CA 1191 mov dptr,#_FLOWHOLDOFF 022B 74 04 1192 mov a,#0x04 022D F0 1193 movx @dptr,a 022E 90 E6 CB 1194 mov dptr,#_FLOWSTB 0231 74 04 1195 mov a,#0x04 0233 F0 1196 movx @dptr,a 0234 90 E6 CC 1197 mov dptr,#_FLOWSTBEDGE 0237 74 03 1198 mov a,#0x03 0239 F0 1199 movx @dptr,a 023A 90 E6 CD 1200 mov dptr,#_FLOWSTBHPERIOD 023D 74 02 1201 mov a,#0x02 023F F0 1202 movx @dptr,a 0240 90 E6 0C 1203 mov dptr,#_GPIFHOLDAMOUNT 0243 E4 1204 clr a 0244 F0 1205 movx @dptr,a 1206 ; usrp_main.c:225: while (1){ 0245 1207 00141$: 1208 ; usrp_main.c:227: if (usb_setup_packet_avail ()) 0245 30*00 03 1209 jnb __usb_got_SUDAV,00105$ 1210 ; usrp_main.c:228: usb_handle_setup_packet (); 0248 12s00r00 1211 lcall _usb_handle_setup_packet 024B 1212 00105$: 1213 ; usrp_main.c:231: if (GPIFTRIG & bmGPIF_IDLE){ 024B E5 BB 1214 mov a,_GPIFTRIG 024D 30 E7 F5 1215 jnb acc.7,00141$ 1216 ; usrp_main.c:237: if (UC_BOARD_HAS_FPGA && (USRP_PA & (bmPA_TX_UNDERRUN | bmPA_RX_OVERRUN))){ 0250 E5 80 1217 mov a,_IOA 0252 54 C0 1218 anl a,#0xC0 0254 60 16 1219 jz 00114$ 1220 ; usrp_main.c:240: if (USRP_PA & bmPA_TX_UNDERRUN) 0256 E5 80 1221 mov a,_IOA 0258 30 E7 03 1222 jnb acc.7,00107$ 1223 ; usrp_main.c:241: g_tx_underrun = 1; 025B 75*03 01 1224 mov _g_tx_underrun,#0x01 025E 1225 00107$: 1226 ; usrp_main.c:243: if (USRP_PA & bmPA_RX_OVERRUN) 025E E5 80 1227 mov a,_IOA 0260 30 E6 03 1228 jnb acc.6,00110$ 1229 ; usrp_main.c:244: g_rx_overrun = 1; 0263 75*02 01 1230 mov _g_rx_overrun,#0x01 1231 ; usrp_main.c:247: fpga_clear_flags (); 0266 1232 00110$: 0266 43 B1 08 1233 orl _IOE,#0x08 0269 53 B1 F7 1234 anl _IOE,#0xF7 026C 1235 00114$: 1236 ; usrp_main.c:253: if (g_tx_enable && !(EP24FIFOFLGS & 0x02)){ // USB end point fifo is not empty... 026C E5*00 1237 mov a,_g_tx_enable 026E 60 2A 1238 jz 00125$ 0270 E5 AB 1239 mov a,_EP24FIFOFLGS 0272 20 E1 25 1240 jb acc.1,00125$ 1241 ; usrp_main.c:255: if (fpga_has_room_for_packet ()){ // ... and FPGA has room for packet 0275 90 E6 F4 1242 mov dptr,#_GPIFREADYSTAT 0278 E0 1243 movx a,@dptr 0279 FA 1244 mov r2,a 027A 30 E0 1D 1245 jnb acc.0,00125$ 1246 ; usrp_main.c:257: GPIFTCB1 = 0x01; SYNCDELAY; 027D 90 E6 D0 1247 mov dptr,#_GPIFTCB1 0280 74 01 1248 mov a,#0x01 0282 F0 1249 movx @dptr,a 0283 00 1250 nop; nop; nop; 1251 ; usrp_main.c:258: GPIFTCB0 = 0x00; SYNCDELAY; 0284 90 E6 D1 1252 mov dptr,#_GPIFTCB0 0287 E4 1253 clr a 0288 F0 1254 movx @dptr,a 0289 00 1255 nop; nop; nop; 1256 ; usrp_main.c:260: setup_flowstate_write (); 028A 90 E6 C8 1257 mov dptr,#_FLOWEQ0CTL 028D 74 21 1258 mov a,#0x21 028F F0 1259 movx @dptr,a 1260 ; usrp_main.c:262: SYNCDELAY; 0290 00 1261 nop; nop; nop; 1262 ; usrp_main.c:263: GPIFTRIG = bmGPIF_EP2_START | bmGPIF_WRITE; // start the xfer 0291 75 BB 00 1263 mov _GPIFTRIG,#0x00 1264 ; usrp_main.c:264: SYNCDELAY; 0294 00 1265 nop; nop; nop; 1266 ; usrp_main.c:266: while (!(GPIFTRIG & bmGPIF_IDLE)){ 0295 1267 00119$: 0295 E5 BB 1268 mov a,_GPIFTRIG 0297 30 E7 FB 1269 jnb acc.7,00119$ 029A 1270 00125$: 1271 ; usrp_main.c:275: if (g_rx_enable && !(EP6CS & bmEPFULL)){ // USB end point fifo is not full... 029A E5*01 1272 mov a,_g_rx_enable 029C 60 A7 1273 jz 00141$ 029E 90 E6 A5 1274 mov dptr,#_EP6CS 02A1 E0 1275 movx a,@dptr 02A2 FA 1276 mov r2,a 02A3 20 E3 9F 1277 jb acc.3,00141$ 1278 ; usrp_main.c:277: if (fpga_has_packet_avail ()){ // ... and FPGA has packet available 02A6 90 E6 F4 1279 mov dptr,#_GPIFREADYSTAT 02A9 E0 1280 movx a,@dptr 02AA FA 1281 mov r2,a 02AB 30 E1 97 1282 jnb acc.1,00141$ 1283 ; usrp_main.c:279: GPIFTCB1 = 0x01; SYNCDELAY; 02AE 90 E6 D0 1284 mov dptr,#_GPIFTCB1 02B1 74 01 1285 mov a,#0x01 02B3 F0 1286 movx @dptr,a 02B4 00 1287 nop; nop; nop; 1288 ; usrp_main.c:280: GPIFTCB0 = 0x00; SYNCDELAY; 02B5 90 E6 D1 1289 mov dptr,#_GPIFTCB0 02B8 E4 1290 clr a 02B9 F0 1291 movx @dptr,a 02BA 00 1292 nop; nop; nop; 1293 ; usrp_main.c:282: setup_flowstate_read (); 02BB 90 E6 C8 1294 mov dptr,#_FLOWEQ0CTL 02BE 74 26 1295 mov a,#0x26 02C0 F0 1296 movx @dptr,a 1297 ; usrp_main.c:284: SYNCDELAY; 02C1 00 1298 nop; nop; nop; 1299 ; usrp_main.c:285: GPIFTRIG = bmGPIF_EP6_START | bmGPIF_READ; // start the xfer 02C2 75 BB 06 1300 mov _GPIFTRIG,#0x06 1301 ; usrp_main.c:286: SYNCDELAY; 02C5 00 1302 nop; nop; nop; 1303 ; usrp_main.c:288: while (!(GPIFTRIG & bmGPIF_IDLE)){ 02C6 1304 00130$: 02C6 E5 BB 1305 mov a,_GPIFTRIG 02C8 30 E7 FB 1306 jnb acc.7,00130$ 1307 ; usrp_main.c:292: SYNCDELAY; 02CB 00 1308 nop; nop; nop; 1309 ; usrp_main.c:293: INPKTEND = 6; // tell USB we filled buffer (6 is our endpoint num) 02CC 90 E6 48 1310 mov dptr,#_INPKTEND 02CF 74 06 1311 mov a,#0x06 02D1 F0 1312 movx @dptr,a 02D2 02s02r45 1313 ljmp 00141$ 1314 ;------------------------------------------------------------ 1315 ;Allocation info for local variables in function 'isr_tick' 1316 ;------------------------------------------------------------ 1317 ;count Allocated with name '_isr_tick_count_1_1' 1318 ;------------------------------------------------------------ 1319 ; usrp_main.c:307: isr_tick (void) interrupt 1320 ; ----------------------------------------- 1321 ; function isr_tick 1322 ; ----------------------------------------- 02D5 1323 _isr_tick: 02D5 C0 E0 1324 push acc 1325 ; usrp_main.c:311: if (--count == 0){ 02D7 D5*04 06 1326 djnz _isr_tick_count_1_1,00102$ 1327 ; usrp_main.c:312: count = 50; 02DA 75*04 32 1328 mov _isr_tick_count_1_1,#0x32 1329 ; usrp_main.c:313: USRP_LED_REG ^= bmLED0; 02DD 63 A0 40 1330 xrl _IOC,#0x40 02E0 1331 00102$: 1332 ; usrp_main.c:316: clear_timer_irq (); 02E0 C2 CF 1333 clr _TF2 02E2 D0 E0 1334 pop acc 02E4 32 1335 reti 1336 ; eliminated unneeded push/pop psw 1337 ; eliminated unneeded push/pop dpl 1338 ; eliminated unneeded push/pop dph 1339 ; eliminated unneeded push/pop b 1340 ;------------------------------------------------------------ 1341 ;Allocation info for local variables in function 'patch_usb_descriptors' 1342 ;------------------------------------------------------------ 1343 ;i Allocated to registers r2 1344 ;ch Allocated to registers r3 1345 ;hw_rev Allocated with name '_patch_usb_descriptors_hw_rev_1_1' 1346 ;serial_no Allocated with name '_patch_usb_descriptors_serial_no_1_1' 1347 ;------------------------------------------------------------ 1348 ; usrp_main.c:324: patch_usb_descriptors(void) 1349 ; ----------------------------------------- 1350 ; function patch_usb_descriptors 1351 ; ----------------------------------------- 02E5 1352 _patch_usb_descriptors: 1353 ; usrp_main.c:330: eeprom_read(I2C_ADDR_BOOT, HW_REV_OFFSET, &hw_rev, 1); // LSB of device id 02E5 75*00r00 1354 mov _eeprom_read_PARM_3,#_patch_usb_descriptors_hw_rev_1_1 02E8 75*01s00 1355 mov (_eeprom_read_PARM_3 + 1),#(_patch_usb_descriptors_hw_rev_1_1 >> 8) 02EB 75*00 05 1356 mov _eeprom_read_PARM_2,#0x05 02EE 75*00 01 1357 mov _eeprom_read_PARM_4,#0x01 02F1 75 82 50 1358 mov dpl,#0x50 02F4 12s00r00 1359 lcall _eeprom_read 1360 ; usrp_main.c:331: usb_desc_hw_rev_binary_patch_location_0[0] = hw_rev; 02F7 90s00r00 1361 mov dptr,#_patch_usb_descriptors_hw_rev_1_1 02FA E0 1362 movx a,@dptr 02FB FA 1363 mov r2,a 02FC 90s00r00 1364 mov dptr,#_usb_desc_hw_rev_binary_patch_location_0 02FF F0 1365 movx @dptr,a 1366 ; usrp_main.c:332: usb_desc_hw_rev_binary_patch_location_1[0] = hw_rev; 0300 90s00r00 1367 mov dptr,#_usb_desc_hw_rev_binary_patch_location_1 0303 EA 1368 mov a,r2 0304 F0 1369 movx @dptr,a 1370 ; usrp_main.c:333: usb_desc_hw_rev_ascii_patch_location_0[0] = hw_rev + '0'; // FIXME if we get > 9 0305 74 30 1371 mov a,#0x30 0307 2A 1372 add a,r2 0308 90s00r00 1373 mov dptr,#_usb_desc_hw_rev_ascii_patch_location_0 030B F0 1374 movx @dptr,a 1375 ; usrp_main.c:335: eeprom_read(I2C_ADDR_BOOT, SERIAL_NO_OFFSET, serial_no, SERIAL_NO_LEN); 030C 75*00r01 1376 mov _eeprom_read_PARM_3,#_patch_usb_descriptors_serial_no_1_1 030F 75*01s00 1377 mov (_eeprom_read_PARM_3 + 1),#(_patch_usb_descriptors_serial_no_1_1 >> 8) 0312 75*00 F8 1378 mov _eeprom_read_PARM_2,#0xF8 0315 75*00 08 1379 mov _eeprom_read_PARM_4,#0x08 0318 75 82 50 1380 mov dpl,#0x50 031B 12s00r00 1381 lcall _eeprom_read 1382 ; usrp_main.c:337: for (i = 0; i < SERIAL_NO_LEN; i++){ 031E 7A 00 1383 mov r2,#0x00 0320 1384 00103$: 0320 BA 08 00 1385 cjne r2,#0x08,00113$ 0323 1386 00113$: 0323 50 29 1387 jnc 00107$ 1388 ; usrp_main.c:338: unsigned char ch = serial_no[i]; 0325 EA 1389 mov a,r2 0326 24r01 1390 add a,#_patch_usb_descriptors_serial_no_1_1 0328 F5 82 1391 mov dpl,a 032A E4 1392 clr a 032B 34s00 1393 addc a,#(_patch_usb_descriptors_serial_no_1_1 >> 8) 032D F5 83 1394 mov dph,a 032F E0 1395 movx a,@dptr 0330 FB 1396 mov r3,a 1397 ; usrp_main.c:339: if (ch == 0xff) // make unprogrammed EEPROM default to '0' 0331 BB FF 02 1398 cjne r3,#0xFF,00102$ 1399 ; usrp_main.c:340: ch = '0'; 0334 7B 30 1400 mov r3,#0x30 0336 1401 00102$: 1402 ; usrp_main.c:341: usb_desc_serial_number_ascii[i << 1] = ch; 0336 8A 04 1403 mov ar4,r2 0338 E4 1404 clr a 0339 CC 1405 xch a,r4 033A 25 E0 1406 add a,acc 033C CC 1407 xch a,r4 033D 33 1408 rlc a 033E FD 1409 mov r5,a 033F EC 1410 mov a,r4 0340 24r00 1411 add a,#_usb_desc_serial_number_ascii 0342 F5 82 1412 mov dpl,a 0344 ED 1413 mov a,r5 0345 34s00 1414 addc a,#(_usb_desc_serial_number_ascii >> 8) 0347 F5 83 1415 mov dph,a 0349 EB 1416 mov a,r3 034A F0 1417 movx @dptr,a 1418 ; usrp_main.c:337: for (i = 0; i < SERIAL_NO_LEN; i++){ 034B 0A 1419 inc r2 034C 80 D2 1420 sjmp 00103$ 034E 1421 00107$: 034E 22 1422 ret 1423 ;------------------------------------------------------------ 1424 ;Allocation info for local variables in function 'main' 1425 ;------------------------------------------------------------ 1426 ;------------------------------------------------------------ 1427 ; usrp_main.c:346: main (void) 1428 ; ----------------------------------------- 1429 ; function main 1430 ; ----------------------------------------- 034F 1431 _main: 1432 ; usrp_main.c:355: memset (hash1, 0, USRP_HASH_SIZE); // zero fpga bitstream hash. This forces reload 034F 75*00 00 1433 mov _memset_PARM_2,#0x00 0352 75*00 10 1434 mov _memset_PARM_3,#0x10 0355 E4 1435 clr a 0356 F5*01 1436 mov (_memset_PARM_3 + 1),a 0358 90 E1 F0 1437 mov dptr,#_hash1 035B 75 F0 00 1438 mov b,#0x00 035E 12s00r00 1439 lcall _memset 1440 ; usrp_main.c:357: init_usrp (); 0361 12s00r00 1441 lcall _init_usrp 1442 ; usrp_main.c:358: init_gpif (); 0364 12s00r00 1443 lcall _init_gpif 1444 ; usrp_main.c:361: IFCONFIG |= bmGSTATE; // no conflict, start with it on 0367 90 E6 01 1445 mov dptr,#_IFCONFIG 036A E0 1446 movx a,@dptr 036B 44 04 1447 orl a,#0x04 036D F0 1448 movx @dptr,a 1449 ; usrp_main.c:363: set_led_0 (0); 036E 75 82 00 1450 mov dpl,#0x00 0371 12s00r00 1451 lcall _set_led_0 1452 ; usrp_main.c:364: set_led_1 (0); 0374 75 82 00 1453 mov dpl,#0x00 0377 12s00r00 1454 lcall _set_led_1 1455 ; usrp_main.c:366: EA = 0; // disable all interrupts 037A C2 AF 1456 clr _EA 1457 ; usrp_main.c:368: patch_usb_descriptors(); 037C 12s02rE5 1458 lcall _patch_usb_descriptors 1459 ; usrp_main.c:370: setup_autovectors (); 037F 12s00r00 1460 lcall _setup_autovectors 1461 ; usrp_main.c:371: usb_install_handlers (); 0382 12s00r00 1462 lcall _usb_install_handlers 1463 ; usrp_main.c:372: hook_timer_tick ((unsigned short) isr_tick); 0385 7ArD5 1464 mov r2,#_isr_tick 0387 7Bs02 1465 mov r3,#(_isr_tick >> 8) 0389 8A 82 1466 mov dpl,r2 038B 8B 83 1467 mov dph,r3 038D 12s00r00 1468 lcall _hook_timer_tick 1469 ; usrp_main.c:374: EIEX4 = 1; // disable INT4 FIXME 0390 D2 EA 1470 setb _EIEX4 1471 ; usrp_main.c:375: EA = 1; // global interrupt enable 0392 D2 AF 1472 setb _EA 1473 ; usrp_main.c:377: fx2_renumerate (); // simulates disconnect / reconnect 0394 12s00r00 1474 lcall _fx2_renumerate 1475 ; usrp_main.c:379: main_loop (); 0397 02s02r11 1476 ljmp _main_loop 1477 .area CSEG (CODE) 1478 .area CONST (CODE) 1479 .area CABS (ABS,CODE)